ST's Spear (Structured Processor Enhanced Architecture) concept combines cost savings and shorter time-to-market with the flexibility of application-specific ICs.
The company said that transfer of the Spear family to 65nm process technology yields increased density, performance and power-reduction features.
The latest configurable system-on-chip integrates an advanced ARM926EJ-S processor core with two 16k memory caches, running at 333MHz, for data and instructions, and up to 300,000 gates (ASIC-equivalent) of embedded configurable logic.
Loris Valenti, general manager of ST's Computer Systems Division, said: " Spear speeds the adoption of customised 65nm IC solutions with an ASIC-like flexibility, at a fraction of the development time and cost of a full-custom design approach."
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iTnews Executive Retreat - Security Leaders Edition
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