Electronics giant Samsung has readied the smallest chip process technology developed so far for production.
The 8-nanometer chip-making process is based on Samsung's current 10nm Lower Power Plus (LPP) technology, but with narrower metal pitch.
In comparison, rival Intel's current Kaby Lake processors use 14nm technology. Its new 10nm Cannonlake parts are delayed until next year.
The chip technology uses fin field effect transistors (FinFET), a three-dimensional design developed in the early 2000s. It derives the name from the component structures that rise above the silicon on insulator substrate-like fins, which form the transistor source and drain gates with lower voltage thresholds to trigger their operation.
This lowers the overall power draw of the chips, and also allows for greater transistor density on the silicon itself.
According to Samsung, 8nm chips will be a tenth smaller than 10nm parts and use 10 percent less power.
Chips made with the 8nm process technology are expected to find their way into both high-density processor servers where low heat output is important, and more power-efficient mobile electronics.
Qualcomm, which is working on its own 7nm technology, will use Samsung's new 8nm LPP process to produce its own chips.
Future chip process shrinks are constrained by current lithography technology producing fine enough wavelengths for the light beams used in fabricating the silicon wafers. However, 7nm and 6nm parts are expected to appear next year.