PCI-SIG, the special interest group responsible for the PCI Express industry-standard I/O architecture, has unveiled release candidate (revision 0.9) of its PCI Express Base 2.0 specification for member review and comment.
The specification extends the data rate of PCIe to 5GT/s in a manner compatible with the existing PCIe 1.1 specifications that support 2.5GT/s signalling. It also features improvements to the protocol and software layers of the architecture.
Stating that work on the specification is "nearly complete", PCI-SIG has assigned its technical workgroups to investigate and develop the scope for potential extensions of the PCI Express protocols to meet future requirements.
Improvements being evaluated include enhanced dynamic power controls, optimised synchronisation, coherency hints and more efficient transaction ordering.
These enhancements will be evaluated for possible inclusion in a collection of incremental extensions to the PCI Express architecture intended to improve the range of design options available to emerging markets and computing models.
PCI-SIG working groups are completing the suite of specifications to enable I/O device virtualisation and sharing.
The draft Address Translation Services 0.9 specification has been released for member review.
The Single-Root and Multi-Root device sharing specifications are in various stages of development and will be released to members for review in the near future.
The PCIe Cable specification has been released to members at revision 0.9 for 60-day review. The new specification supports cables up to 10 metres running at 2.5Gbps.
PCI Express 2.0 specs released
By Robert Jaques on Oct 13, 2006 11:51AM