The company showed off working models of the 'Penryn' chip at a presentation at its corporate headquarters in Silicon Valley.
Intel demonstrated a low-power dual-core processor for notebook computers, as well as dual-core and quad-core versions of desktop and server processors. It is also working on 10 additional 45nm models.
The chipmaker touted Penryn as the greatest semiconductor breakthrough in 40 years because it allows the company to continue to use current-generation silicon dioxide technology.
Intel claims that the chip will put the firm a year ahead of the competition.
It was previously believed that silicon dioxide could not be used beyond 65nm because chip components were getting too small.
The layer of silicon dioxide covering the gate in a transistor in a 65nm chip, for instance, is about five atoms thick, or about 1.2nm, and cannot be minimised any further.
"When they first described this to me a couple of years ago, I said that this cannot possibly work," Intel chief executive Paul Otellini said at the event.
"But we are doing it with this level of technology, we do not need Silicon on Insulator, we do not need emerging lithography. It is just high performance, high volume, low cost innovation."
Silicon on Insulator is often touted as a technique that allows chip manufacturers to curb power leakage in next-generation semiconductors.
AMD and IBM use the technique in some of their processors, but Intel maintains that the technology's power benefits do not measure up to the added costs.
Immersion lithography uses highly purified water during the lithography process, but Intel believes that the technique will not by ready until 2009 when the chipmaker plans to switch to a 32nm production process.
Other chipmakers, such as IBM and Texas Instruments, are preparing to use immersion lithography for their 45nm chips.
Intel avoided having to turn to more expensive production techniques for the Penryn chip by deploying a combination of high-k dielectric and metal gate techniques.
The high-k dielectric layer refers to the insulation properties of a tiny layer of material covering the gate in a transistor.
Current production techniques use a layer of silicon dioxide, but Intel will replace this with a layer of hafnium in its 45nm chips. Because it is multiple atoms thick, it allows scientists to further shrink it for future, smaller designs.
On top of the hafnium, Intel boffins placed a metal gate, replacing current generation polysilicon technology. The company did not disclose which metals it used for competitive reasons.
"There are hundreds of material options for metal electrodes and high-k dielectics," said Mark Bohr, a senior fellow in Intel's logic technology development team.
"Finding the combination of high-k dielectrics and two different metal materials that work, that meet high performance, low leakage, reliability and manufacturing requirements, is a very significant accomplishment.
"I do not believe that any other company is this far along with high-k gates, nor do I believe that they will have it in a 32nm version or later."
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