Samsung boffins develop 16GB chip technology

Samsung has developed a chip-stacking process that allows it to pack 16GB of Nand Flash in a multi-chip package (MCP). 

The process ties 16 8Gb Nand Flash chips together to create a 16GB tower of chips.
Samsung said that the thinner MCP is a combination of key technologies such as wafer thinning, redistribution layer, chip sawing and wire bonding.

The new wafer thinning technology has reduced the thickness of the wafer to just 30 micrometres, which is similar to the 20 to 30 micrometre size of human cells.

Improved laser cutting technology slices the wafer into individual chips without them breaking into pieces.

Samsung said that conventional blade sawing technology was originally designed only for sawing wafers up to 80 micrometres thick.

Chips in the MCP are stacked vertically using a redistribution layer technology that allows wafer fabricators to adhere the wire contacts from just one side, unlike the conventional method of extending wire connection from both sides of each chip.

Along with a single wire contact per die, the dies are placed in a zig-zag stack to minimise the use of space and the length of the wire connectors.

The thickness of the adhesive has also been reduced to 20 micrometres to limit the height of the 16-die stacked height to 1.4mm.

"The new MCP technology supports the industry-wide demand for small form factors and high-densities that will accommodate multimedia-intensive user applications," said Samsung in a statement.

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