Samsung claims first 50nm DRAM chip

Samsung Electronics claimed today to have won the race to develop the first 50nm DDR2 DRAM chip.

According to the company, the move to 50nm will increase production efficiency from the previous 60nm level by 55 percent.

The 1Gb DRAM incorporates technologies including 3D transistor design and multi-layered dielectric technology designed to enhance performance and data storage capabilities.

Samsung said that the use of a selective epitaxial growth transistor is key to the production efficiencies in the 50nm process.

The 3D transistor has a broader electron channel that optimises the speed of each chip's electrons to reduce power consumption and enable higher performance.

Samsung's proprietary Recess Channel Array Transistor (RCAT) technology has been adapted to work with the firm's 50nm DRAM process.

The RCAT, which effectively doubles the refresh term of DRAM, is described by the Korean firm as a "critical technology supporting higher scalability for DRam regardless of chip size".

Samsung added that the newly developed 50nm process technology can be applied to a broad range of DRAM chips including graphics and mobile DRAM.

Mass production is scheduled for 2008, by which time Samsung predicts that 50nm chips will become the mainstay of a DRAM market that will account for US$55 billion by 2011.

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