MIT's hybrid microchip to overcome silicon size barrier

Researchers have developed a 'hybrid microchip' that could advance electronics beyond the limits of Moore's Law.

According to Moore's Law, the number of transistors on an integrated circuit doubles every two years, leading to an exponential improvement in electronics.

However, as devices get smaller, it is increasingly difficult for manufacturers to continue the trend on conventional silicon microchips.

Chips made from new materials such as gallium nitride could deliver better performance, but researchers have been unable to match the efficiency and reliability of silicon microchips so far.

MIT researcher Tomas Palacios suggests a hybrid microchip that combines semiconductor materials with different and complementary characteristics.

With graduate student Will Chung, Palacios has successfully embedded a gallium nitride layer into the same type of silicon substrate that is used by the silicon electronics industry.

The hybrid chip could be used in high-power integrated wireless transmitters, power gating and power conversion circuits, and in-chip optical interconnections.

In future, MIT's method could also be used to combine technologies such as spintronics and lasers on a silicon chip.

It could lead to more efficient mobile phone manufacturing, replacing four or five separate chips made from different semiconductor materials.

"We think heterogeneous integration will allow us to keep up with Moore's Law in terms of performance enhancement rather than device scaling," Palacios told iTnews.

"There are many advanced materials and technologies that can improve the performance of [the] silicon chip by being integrated with silicon technology ... we think the hybrid microchip will be effective and last for a long time."

The technology is expected to be commercialised in 'a couple of years', after it is successfully scaled to larger, conventional wafer diameters.